Integrated Circuit Design

Compulsory module in winter term

Master of Information and Electrical Engineering 
in the specialist areas information and communication engineering

Entry requirements

Knowledge of digital circuit design, programming

Learning targets / competencies

Ability to design complex digital circuits in VHDL and implement complex circuits in FPGAs.

Content

1. Introduction

1. Introduction

–History

–Technologies

- Producer

2. Architectures of programmable logic devices

2. Architectures of programmable logic devices

–Classification

–Structures

–Logical basic elements

–Connection elements

–Configurations

–I/O – Architectures

3. Methods of IC design

3. Methods of IC design

–Design technics

–Schematic

–Hardware description languages

[Translate to English:] 4. Integrated Software Enviromental

[Translate to English:] 4. Integrated Software Enviromental

- ISE WebPack 

- VIVADO

5. Hardware description language VHDL

5. Hardware description language VHDL

[

–Basic concepts

•Entity description / Interface description

•Architecture description

•Configuration

–Variable, Signals

–Data types

–Assignments and  control structures

–Concurrent statements

–Attributes

–Function

–Procedures

–Packages

-Simulating HDL Design

6. Application and Implementation

6. Application and Implementation

-Combinatorial designs

-Sequential designs

-Circuits with memory blocks

-Arithmetic designs

-Implementation of micro processors(Architectures, embedded, core generation)

-Digital Filter implementation (FIIR / IIR Filter)

Literature

Meyer-Baese, U.:  Digital Signal Processing with FPGA. Springer 2014

Churiwala, A.: Designing with XILINX FPGAs Using Vivado. Springer 2017

Ashenden, Peter:  The VHDL Cookbook.

Müller; Hosseini.  Introduction in ISE Web Pack

Kesel, F.; Bartholomä, R.:  Entwurf von digitalen Schaltungen und Systemen mit HDLs und FPGAs. Oldenbourg Verlag 2006

Reichardt, J.; Schwarz, B.:  VHDL – Synthese

Molitor, P.; Ritter, J. :   VHDL   Eine Einführung. Pearson 2004

Lehmann, G.:  Schaltungsdesign mit VHDL. Franzis Verlag.

 

Lecturer:

1 CH lecture, 1 CH seminar, 2 CH laboratory-based practical classes

Assessment types:

120 minute written examination or 20 minute oral examination or alternative assessment, see Appendix 1 of the examination regulations

Prerequisite for admission to examinations defined by the examination regulations, section 7 (4)

Credits:

5 CR